The term specifying both the programs and the relative frequencies is known as _____________
The term specifying both the programs and the relative frequencies is known as _____________
Make a decision based on the results of above instruction while its being executed, is referred to as _____________
Make a decision based on the results of above instruction while its being executed, is referred to as _____________
An instruction that does no operation for changing state is known as ____________
An instruction that does no operation for changing state is known as ____________
Delay in finding the proper instruction to fetch is known as control hazard, also referred to as _____________
Delay in finding the proper instruction to fetch is known as control hazard, also referred to as _____________
Pipeline stalling concept is often given the name of ______________
Pipeline stalling concept is often given the name of ______________
To discard instructions in the pipeline is referred to as _____________
To discard instructions in the pipeline is referred to as _____________
Branch, MemWrite and MemRead are control lines set of _____________
Branch, MemWrite and MemRead are control lines set of _____________
Predicting branches at runtime by using run-time information, is known as _________
Predicting branches at runtime by using run-time information, is known as _________
Register $2 written by subtraction can be written in the instruction _____________
Register $2 written by subtraction can be written in the instruction _____________
The hazards in the pipelined stages are of ____________
The hazards in the pipelined stages are of ____________
The instruction being read from memory using the address placed in the PC and then is placed in the IF/ID pipeline register in, ______________
The instruction being read from memory using the address placed in the PC and then is placed in the IF/ID pipeline register in, ______________
When multiple-instructions are overlapped during execution of the program, then function performed is called ____________
When multiple-instructions are overlapped during execution of the program, then function performed is called ____________
In pipelined instruction time between instructions, assuming ideal conditions, is equal to _____________
In pipelined instruction time between instructions, assuming ideal conditions, is equal to _____________
In instruction execution of pipelined processor the WB stage is the _____________
In instruction execution of pipelined processor the WB stage is the _____________
The given set of instructions add $s0, $t0, $t1; sub $t2, $s0, $t3; shows the ____________
The given set of instructions add $s0, $t0, $t1; sub $t2, $s0, $t3; shows the ____________